CPU ID和序列号背后的那些事

public static String executeLinuxCmd(int type) {        try {            String cmd = "dmidecode |grep 'Serial Number'";            if (type == 1) {                cmd = "fdisk -l";            }            //...        } catch (IOException e) {//        }        return null;    }        public static String getSerialNumber(int type, String record, String symbol) {            String execResult = executeLinuxCmd(type);            String[] infos = execResult.split("\n");            for (String info : infos) {                info = info.trim();                if (info.indexOf(record) != -1) {                    String[] sn = info.replace(" ", "").split(symbol);                    return sn[1];                }            }       //...        }              /**     * 获取CPUID、硬盘序列号、MAC地址、主板序列号     *     * @return     */    public static Map<String, String> getAllSn() {        String os = System.getProperty("os.name");        Map<String, String> snVo = new HashMap();        if ("LINUX".equalsIgnoreCase(os)) {            String mainboardNumber = getSerialNumber(0, "Serial Number", ":");            String diskNumber = getSerialNumber(1, "Disk identifier", ":");            snVo.put("diskid", diskNumber == null ? "tmpDiskId" : diskNumber.toUpperCase().replace(" ", ""));            snVo.put("mainboard", mainboardNumber == null ? "tmpMainboard" : mainboardNumber.toUpperCase().replace(" ", ""));        } else {

Handle 0x0001, DMI type 4, 48 bytesProcessor Information        Socket Designation: CPU0        Type: Central Processor        Family: ARMv8        Manufacturer: Phytium        ID: 33 66 1F 70 00 00 00 00        Signature: Implementor 0x70, Variant 0x1, Architecture 15, Part 0x663, Revision 3        Version: S2500        Voltage: 0.8 V        External Clock: 100 MHz        Max Speed: 2100 MHz        Current Speed: 2100 MHz        Status: Populated, Enabled        Upgrade: Unknown        L1 Cache Handle: 0x1001        L2 Cache Handle: 0x1002        L3 Cache Handle: 0x1003        Serial Number: A5F9B8AD-E023-7E89-CF01-4717766ADE55        Asset Tag: 9EEC0F77-D6DB-EE11-4788-C0AA5670B445        Part Number: ABD15C33-35D3-1659-BFAF-AD67F87235C9        Core Count: 64        Core Enabled: 64        Thread Count: 64        Characteristics:                64-bit capable                Multi-Core                Execute Protection                Enhanced Virtualization                Power/Performance Control

EAX=3: Processor Serial Number
See also:  Pentium III § Controversy about privacy issues
This returns the processor's serial number. The processor serial number was introduced on Intel Pentium III, but due to privacy concerns, this feature is no longer implemented on later models (PSN feature bit is always cleared). Transmeta's Efficeon and Crusoe processors also provide this feature. AMD CPUs however, do not implement this feature in any CPU models.
For Intel Pentium III CPUs, the serial number is returned in EDX:ECX registers. For Transmeta Efficeon CPUs, it is returned in EBX:EAX registers. And for Transmeta Crusoe CPUs, it is returned in EBX register only.
Note that the processor serial number feature must be enabled in the BIOS setting in order to function.
refer:https://en.wikipedia.org/wiki/Pentium_III#Controversy_about_privacy_issues

ProcessorIdData type: stringAccess type: Read-onlyProcessor information that describes the processor features. For an x86 class CPU, the field format depends on the processor support of the CPUID instruction. If the instruction is supported, the property contains 2 (two) DWORD formatted values. The first is an offset of 08h-0Bh, which is the EAX value that a CPUID instruction returns with input EAX set to 1. The second is an offset of 0Ch-0Fh, which is the EDX value that the instruction returns. Only the first two bytes of the property are significant and contain the contents of the DX register at CPU reset—all others are set to 0 (zero), and the contents are in DWORD format."

#include "stdafx.h"#include<iostream> int main(){     int32_t deBuf[4];    __cpuidex(deBuf, 01, 0);    printf("%.8x%.8x", deBuf[3], deBuf[0]);    getchar();    return 0;}

#include <stdio.h>static inline void native_cpuid(unsigned int *eax, unsigned int *ebx,                                unsigned int *ecx, unsigned int *edx){        /* ecx is often an input as well as an output. */        asm volatile("cpuid"            : "=a" (*eax),              "=b" (*ebx),              "=c" (*ecx),              "=d" (*edx)            : "0" (*eax), "2" (*ecx));}
int main(int argc, char **argv){  unsigned eax, ebx, ecx, edx;
  eax = 1; /* processor info and feature bits */  native_cpuid(&eax, &ebx, &ecx, &edx);
  printf("stepping %d\n", eax & 0xF);  printf("model %d\n", (eax >> 4) & 0xF);  printf("family %d\n", (eax >> 8) & 0xF);  printf("processor type %d\n", (eax >> 12) & 0x3);  printf("extended model %d\n", (eax >> 16) & 0xF);  printf("extended family %d\n", (eax >> 20) & 0xFF);
  /* EDIT */  eax = 3; /* processor serial number */  native_cpuid(&eax, &ebx, &ecx, &edx);
  /** see the CPUID Wikipedia article on which models return the serial       number in which registers. The example here is for       Pentium III */  printf("serial number 0x%08x%08x\n", edx, ecx);

#include <stdio.h>
int main(int argc, char **argv){   unsigned long arm_cpuid;  __asm__("mrs %0, MIDR_EL1" : "=r"(arm_cpuid));  printf("%-20s: 0x%016lx\n", "MIDR_EL1=", arm_cpuid);}

[root@master98 ch]# gcc cpu.c -o cpu[root@master98 ch]# ./cpuMIDR_EL1=           : 0x00000000701f6633